1. Field of Invention
The present invention relates to a device array substrate. More particularly, the present invention relates to an active device array substrate.
2. Description of Related Art
As the need for displays grows rapidly, the industries have devoted to the developments related to displays. The cathode ray tube (CRT) display, in particular, has played a dominant role in the display market for years as result of its extraordinary displaying quality and technical maturity. Since the displays with minor power consumption and lesser radiation lead by the thriving concepts for the environment protection recently are demanded and that requires, the traditional CRT display cannot meet these requirements. Also, the traditional CRT display is strictly limited in its size and shape, and thus it cannot fulfill the market trends to design and produce the display as a light, thin, small and exquisite gadget. Hence, the thin film transistor liquid crystal display (TFT-LCD) that features high resolution, low consumption, no radiation and so forth, has become the mainstream in the display marketplace.
FIG. 1 schematically shows a top view of a traditional TFT array substrate. Please refer to FIG. 1. The traditional TFT array substrate 100 comprises a substrate 110, a plurality of scan lines 120, a plurality of data lines 130, a plurality of common lines 140, a plurality of TFTs 150 and a plurality of pixel electrodes 160. Wherein, the scan lines 120 and data lines 130 are disposed on the substrate 100 and they construct a plurality of pixel regions 10a. The TFTs 150 are respectively disposed in these pixel regions 110a and each of the TFTs 150 is electrically connected to a scan line 120 and a data line correspondingly. The pixel electrodes 160 are respectively disposed in these pixel regions 110a and each of the pixel electrodes 160 is electrically connected to a TFT 150 correspondingly.
The common lines 140 and scan lines 120 are roughly parallel and they are staggeringly disposed on the substrate 110. Each of the common lines 140 has a plurality of branches 140a extending outside from their edges of two sides and these branches 140a are adjacent to these data lines 130. Additionally, since these branches 140a are partly overlapped with the edge of each of pixel electrodes 160, the branches 140a can not only raise the storage capacitance value Cst but provide the shielding for the abnormal alignment region between each of pixel electrodes 160 and these data lines 130. Nevertheless, due to the limitations of line widths for these branches 140a and the requirements of alignment precision for each layer in the traditional TFT array substrate 100, the aperture ratio of the TFT array substrate 100 cannot be further increased.